Napatech NT4E-STD network adapter

Condition: New

The NT4E-STD accelerator provides full line-rate reception and transmission as well as time-stamping capabilities that can accelerate network analysis applications in both packet capture and in-line applications. The design of the NT4E-STD provides guaranteed delivery of analysis data to applications under all conditions with zero packet loss. This includes on-board buffering capabilities that ensure that no packets are lost due to congestion in the server or the application.

Reliably Increase Performance
The NT4E-STD accelerator provides full line-rate reception and transmission as well as time-stamping capabilities that can accelerate network analysis applications in both packet capture and in-line applications. The design of the NT4E-STD provides guaranteed delivery of analysis data to applications under all conditions with zero packet loss. This includes on-board buffering capabilities that ensure that no packets are lost due to congestion in the server or the application.

Statistic Information
The NT4E-STD accelerator provides an extensive amount of statistics counters. This enables customer applications to do comprehensive network traffic analysis with extremely low CPU load.

Analyze the Essentials
Fixed slicing allows only essential data to be analyzed lightening the load for the analysis application. For example, if only header data needs to be examined, then the pay load can be discarded by the NT4E-STD before the data is forwarded to the application. In addition, the ability to direct data to up to 4 CPU cores enables parallel analysis of data increasing the efficiency of the network analysis application.

Hardware Time Stamp
The ability to establish the precise time when frames have been captured is critical to many applications. To achieve this, all Napatech accelerators are capable of providing a high-precision time stamp with nanosecond resolution for every frame captured and transmitted. At 10 Gbps, an Ethernet frame can be received and transmitted every 67 nanoseconds. At 100 Gbps, this time is reduced to 6.7 nanoseconds. This makes nanosecond precision time-stamping essential for uniquely identifying when a frame is received.

Full line-rate packet capture
Napatech accelerators are highly optimized to capture network traffic at full line rate, with almost no CPU load on the host server, for all frame sizes. These capabilities set Napatech accelerators apart from any other network adapters in the industry. Zero-loss packet capture is critical for applications that need to analyze all the network traffic in real-time. If anything needs to be discarded, it is a matter of choice by the user, not a limitation of the accelerator. Standard Network Interface Cards (NICs) are not designed for analysis applications where all traffic on a connection.

Frame buffering
Napatech accelerators provide on-board memory for buffering of Ethernet frames.Buffering assures guaranteed delivery of data even when there is congestion. There are three potential sources of congestion; the first source of congestion is the PCI interface, the second is the server platform and the third is the analysis application. PCI interfaces provide a fixed bandwidth for transfer of data from the accelerator to the application. For some accelerators, this can limit the amount of data that can be transferred from the network to the application.

Full Line-Rate Transmit
Full line-rate transmit is an important capability for a number of test and analysis applications. Testing network performance under maximum load is increasingly important to assure quality of experience, but also to harden networks against attacks, such as Distributed Denial of Service (DDoS) attacks. Napatech accelerators make it possible to build solutions where the maximum transmission capability can be achieved to thoroughly test network resilience. With Napatech accelerators.

Buffer size configuration
Buffer size configuration can have a dramatic effect on the performance of analysis applications. Different applications have different requirements when it comes to latency or processing. It is therefore important that the number and size of buffers can be optimized for the given application. Napatech accelerators make this possible.The flexible server buffer structure supported by Napatech accelerators can be optimized for different application requirements: Applications needing short latency can have frames delivered in small chunks.

Local Retransmit
Local retransmit allows traffic to be received by the Napatech accelerator and retransmitted back to the network at full line rate, without utilizing the host CPU, host memory, or PCI bandwidth. This useful when traffic needs to be analyzed by more than one appliance or the load needs to be spread amongst several appliances. It is also useful when certain traffic does not need to be analyzed and just needs to be forwarded. Local retransmit can be enabled while frames are being captured. A copy is essentially provided for retransmit to a specified port.

Inter-Frame Gap Control
The inter-frame gap (IFG) is the time delay or gap between frames when they are transmitted. This is normally 96 bit times, which corresponds to 9.6 ns for 10 Gbps transmission, but can be changed without affecting the integrity of the transmission. This can be required to adapt to different network situations and applications. With Napatech accelerators it is possible to precisely control the IFG. It is possible to control the IFG individually for each frame transmitted.

Extended RMON1 port statistics
Napatech accelerators have full RMON1 support for i.e.: Frames received Frames received by size interval Bytes received Broadcast, multicast and unicast frames received Fragmented frame details Frames discarded with specification of reason Frames with CRC, alignment or code errors Frames with ISL, VLAN and VLAN tags Undersized/small frames both good and bad Oversized/large frames both good and bad Collisions detected Large hard-sliced frames both good and bad Link down occurrences.

Synchronized statistics delivery
For the counters and statistics collected to be useful, they need to be correlated with the actual data captured or transmitted. To enable this, the generated statistical data is time-stamped with the same precision as captured frames. The accelerator collects statistics for a certain defined period of time. Once the time interval is reached, the block of statistics is time-stamped with the same clock and time-stamp engine as is used for time-stamping of captured frames. The block is then transferred to memory where it is available to the analysis application.

Monitoring sensors
Napatech accelerators are designed and built for high reliability and long life use. Analysis applications run constantly usually at high throughput rates. There is therefore a need for highly reliable products that can sustain this kind of performance. Napatech accelerators provide monitoring sensors that allow users to monitor performance and detect issues before they occur assuring a long lifetime for Napatech accelerators and protection of investment. Sensors on the accelerators provide extensive monitoring.

Slicing
Napatech accelerators address one of the main challenges in analyzing real-time data in high-speed networks: the sheer volume of data to be analyzed. Reducing the amount of data to be analyzed can often accelerate the performance of analysis applications. Slicing is a feature designed to remove parts of a frame. This is often used when there is a need to analyze packet headers only, or where the timing of frames is the main concern. In such situations, the packet payload that is not required can be removed. Since the payload is often the largest part of the Ethernet frame, this can.

Cache pre-fetch optimization
Napatech accelerators make optimal use of the latest cache pre-fetch mechanisms to ensure fast processing of data by analysis application. This unique approach also ensures that delays and congestion are minimized leading assuring guaranteed delivery. Modern server CPUs use several layers of memory for processing of data. There are three levels of cache memory for fast processing as well as RAM. Access times for level 1 cache are much faster than level 2, which are in turn are faster than level 3. For real-time applications.

Multi-port data merge
Napatech accelerators typically provide multiple ports. Ports are typically paired as one port received upstream data and another port receives downstream data. Since there can be flows in both direction that need to be analyzed as one, there is a need to merge the data from both ports into a single analysis stream. Napatech accelerators can merge data received on multiple ports in hardware using the precise time-stamps of each Ethernet frame. This is highly efficient and offloads a significant and costly task from the analysis application.

Multi-accelerator data merge
Many analysis applications only monitor and analyze at a single point in the network. Yet, there is a growing need for analysis appliances that monitor and analyze multiple points in the network and even provide a network-wide view of what is happening. This requires multiple accelerators to be installed in a single appliance. But, it also requires that the analysis data from all of these accelerators needs to be correlated. With the Napatech Software Suite, it is possible to merge the analysis data from multiple accelerators into a single analysis stream.

Network Interfaces